1. Field of the Invention
This invention relates to a picture signal conversion device for converting the mode of a picture signal into a different mode.
2. Description of the Related Art
In the television signal of the NTSC system of today, a field signal of 262.5 scanning lines is obtained by interlaced scanning every 1/60 sec. for every one field period. A one-frame signal of 525 scanning lines is formed for every two fields. It has been contrived to obtain a high definition signal conversion processing circuit by arranging it to convert the present television signal to have twice as many scanning lines and to have it displayed on a high definition monitor or the like. FIG. 1 of the accompanying drawings shows in a block diagram the basic arrangement of the conventional high definition signal conversion processing circuit. A television signal 1 (an analog signal) which is supplied to an input terminal 1 has its high zone frequency cut off at a low-pass filter 2 and is then converted by an analog-to-digital (A/D) converter 3 into a digital signal. The digital signal is supplied to a first time-base compression circuit 5 and also to a field memory 4. A signal produced from the field memory 4 is supplied to a second time-base compression circuit 6.
The signal from the field memory 4 is a signal for a preceding field. In the case of a 2:1 interlaced scanning method, this signal is a signal for scanning the intermediate scanning lines of the present field. The present field signal which is produced from the A/D converter 3 and the preceding field signal which is thus produced from the field memory 4 is time-base compressed into 1/2 respectively by time-base compression circuits 5 and 6. The compressed signals from the circuits 5 and 6 are alternately taken out via a changeover switch 7 at every scanning line period. By this arrangement a signal which has a doubled number of scanning lines is supplied to a digital-to-analog (D/A) converter 8 which operates at a sampling frequency twice as high as the operation of the A/D converter 8. An analog signal thus obtained from the D/A converter 8 is allowed to pass through a low-pass filter 9 which has a cut-off frequency thereof arranged to be twice as high as that of the above-stated low-pass filter 2. An output terminal 10 then produces a high definition analog television signal which consists of a doubled number of scanning lines.
FIG. 2 shows in a block diagram a composite color television system to which the above-stated basic arrangement of the prior art circuit is applied. An incoming composite color television signal is received at an input terminal 11. The signal is supplied to a Y/C separation circuit 12 to be divided into a luminance signal Y and a chrominance signal C. The chrominance signal C is demodulated by a color demodulation circuit 13, for example, into color difference signals such as I and Q signals. The luminance signal Y is then processed into a high definition signal to have its number of scanning lines doubled by a signal conversion processing circuit 14 which is arranged as shown in FIG. 1.
The color difference signals I and Q are also likewise processed by another signal conversion processing circuit 15. Following that process, these signals are supplied to a materix circuit 16 along with the high definition processed luminance signal from the circuit 14. The matrix circuit 16 then produces signals R, G and B of the three primary colors for display on a high definition color monitor 17.
Referring to FIG. 3, in the high definition signal conversion processing method for increasing the number of scanning lines by two times, the signal of each scanning line X in between adjacent signals A and B of a present field i is arranged to be obtained as an interpolation signal, for example, either by directly using the signal of a corresponding scanning line X' of a preceding field or by using a signal having a mean value of signals of the scanning lines A and B located above and below the scanning line X.
As exemplified in the foregoing, there have been proposed various methods for obtaining an interpolation signal either by using a scanning line signal of the preceding field or by selectively using scanning line signals of the present field. It is, however, a common basic concept among these various methods to use the scanning line signal of the preceding field for a picture which does not have much motions such as a still picture and to use scanning line signals of the present field for a picture having much motions. In accordance with the above-stated conventional arrangement, a high quality picture is obtainable in cases where the picture is obtained on the basis of information on an image having not much motions. Whereas in the event of a display picture resulting from information on an image having much motions, it has been hardly possible to obtain a picture in a high quality.
FIG. 4 shows another example of the conventional circuit arrangement. In this case, a level difference between picture signals of frames and a fixed threshold value level is compared to detect any movement or motions of an image; scanning line signals of the present field are used for obtaining an interpolation signal if the detected movement is much; and an interpolation signal is obtained from a scanning line signal of an adjacent field if the movement is found not much. In FIG. 4, the same reference numerals as in FIG. 1 are used for indicating parts similar to those shown in FIG. 1. An incoming picture signal is received at an input terminal 1. The incoming signal is supplied via a low-pass filter 2 to an A/D converter 3 to be converted into a digital picture signal. The digital signal produced from the A/D converter 3 is supplied to a 262H- delay circuit 18 (H: one horizontal scanning period). The output of the delay circuit 18 is supplied to a 1H delay circuit 19. The output of the delay circuit 19 is supplied to another 262H delay circuit 20.
Therefore, as shown in FIG. 5, the A/D converter 3 and the delay circuits 18, 19 and 20 produce a scanning line signal X32 (the direct output of the A/D converter 3) for the ensuing field; a scanning line signal X23 (the output of the delay circuit 18) which is for the present field and is delayed 262H; a scanning line signal X21 which is for the present field and is delayed 1H from the signal X23; and a scanning line signal X12 which is for the preceding field and is delayed 262H from the signal X21. The outputs of the 262H delay circuit 18 and the 1H delay circuit 19 are supplied to an adder 21. The output of the adder 21 is supplied to a 1/2 coefficient circuit 22. The circuit 22 produces a signal of a value (X21+X23)/2.
Further, the output of the A/D converter 3 and that of the 262H delay circuit 20 are supplied to the adder 23. The output of the adder 23 is supplied to another 1/2 coefficient circuit 24. The circuit 24 produces a signal of a value (X12+X32)/2.
The outputs of the two 1/2 coefficient circuits 22 and 24 are supplied to a change-over switch 25 which operates under a control signal and are then supplied to a time-base compression circuit 6. Meanwhile, the output X21 of the 1H delay circuit 19 is supplied to another time-base compression circuit 5.
The outputs of the two time-base compression circuits 5 and 6 are supplied to the two input terminals of a switch 7. The change-over output of the switch 7 is supplied to a low-pass filter 9. The output of the lowpass filter 9 is supplied to an output terminal 10.
Referring to FIG. 5, a subtracter 26 is arranged to take out, as a difference signal showing a difference between picture signals of frames, a difference signal representing a difference between the picture signals X12 and X32 of the preceding and ensuing fields. The difference signal thus obtained is supplied to the negative input terminal of a comparator 27. Meanwhile, a fixed reference level signal (Th) is supplied to the positive input terminal of the comparator 27. The level of the difference signal representing the difference between the signals X12 and X32 is compared with the level of the reference level signal at the comparator 27. The comparator 27 thus produces a detection signal indicative of the result of a discrimination made to find out whether the difference signal is at a higher level than the reference level signal. When the detection signal produced from the comparator 27 is at a high level, the incoming picture signal is judged to represent unmoving image information and the connecting position of the switch 25 is shifted to a position on the side of the 1/2 coefficient circuit 24. When the output of the comparator 27 is at a low level, the incoming picture signal is judged to represent moving image information and the switch 25 is shifted to a position on the side of the other 1/2 coefficient circuit 22.
In the conventional arrangement described, however, the reference level signal which is supplied to the comparator 27 is at a fixed level. This brings about the following problem: There is a possibility that the comparator 27 might suddenly come to produce its output at a low level while the image information borne by the incoming signal has been judged to have no motions with the output of the comparator 27 produced at a high level at a point several lines (say, 8 lines) before the present interpolation point. This is likely caused by a noise or instability of the circuit arrangement because Generally, such a change from a still state to a moving state seldom takes place. Therefore, it is hardly possible with the circuit arranged as shown in FIG. 4 to accurately detect the motion of an image and to select an optimum interpolation signal.
Further, in cases where the resolution of the device is low and the image teems with noises, the conventional circuit arrangement described above fails to give any adequate effect of a high definition signal conversion process. To solve this problem, there has been proposed a noise removing circuit which is arranged as shown in FIG. 6 to remove noises from a noise-laden television signal by utilizing a frame memory. Referring to FIG. 6, a television signal received at an input terminal 28 is converted into a digital signal by an A/D converter 29. The digital signal thus obtained is supplied to a subtracter 31 which then obtains a difference between the signal and another signal of a preceding frame produced from a frame memory 30. A difference signal thus obtained is multiplied k times (0.ltoreq.k.ltoreq.1) at a coefficient integration circuit 32. The signal which is thus multiplied by k times is supplied to an addition circuit 33 to be added to a signal coming from the A/D converter 29.
The output of the addition circuit 33 is supplied to the frame memory 30 and is also to a lowpass filter 35 via a D/A converter 34. In this circuit arrangement, the value k used at the coefficient integration circuit 32 is determined according to the magnitude of the output of the subtraction circuit 31 representing a difference between frames. The value k is arranged to become closer to 1 if the difference signal is small and closer to 0 if the signal is large. By virtue of this arrangement, the output of the addition circuit 33 becomes a picture signal from which noises in the still picture portion thereof have been removed. Meanwhile, in the case of a picture signal having a moving image, however, the noise removing circuit is still remains incapable of solving the problem of having deteriorated resolution. Therefore, even with a high definition signal conversion process carried out after removal of noises by such a noise removing circuit, it is hardly possible to attain adequate effect of the high definition signal conversion process.